Photovoltaic devices generate an electric current in response to incident light. One class of photovoltaic devices commonly used today is based on crystalline silicon solar absorber layers. Crystalline silicon photovoltaic devices include, for example, thick silicon wafers. These wafers are fragile and cannot be bent without risk of damage, and therefore, the wafers must be disposed on a rigid substrate, such as a large-area rigid glass substrate. Although crystalline silicon photovoltaic devices may achieve relatively high efficiencies, they are typically expensive and heavy. Additionally, their inflexibility prohibits their use in non-planar applications, or in applications subject to bending. Furthermore, their weight prohibits some roof top applications.
Accordingly, there is great interest in developing “thin-film” photovoltaic devices, which are potentially thinner, lighter, and cheaper than crystalline silicon photovoltaic devices. Additionally, a thin-film photovoltaic device will typically tolerate at least some flexing, potentially allowing use of a flexible substrate, so that the photovoltaic device is flexible. A flexible photovoltaic device may advantageously conform to non-planar surfaces and/or be used in applications subject to bend flexing.
FIG. 1 shows a cross-sectional view of a conventional thin-film photovoltaic device 100, which includes a thin-film stack 102 disposed on a substrate 104. Photovoltaic stack 102 includes a first electrical contact layer 106, such as a Molybdenum layer, disposed on a first or front outer surface 108 of substrate 104. A solar absorber layer 110 is disposed on first electrical contact layer 106, and a heterojunction partner layer 112 is disposed on solar absorber layer 110. A second electrical contact layer 114, such as a conductive oxide layer, is typically disposed on heterojunction partner layer 112. Solar absorber layer 110 and heterojunction partner layer 112 collectively form a P-N photovoltaic junction, which generates an electric current in response to incident light. First and second electrical contact layers 106, 114 provide an electrical interface to the photovoltaic junction. Some examples of possible solar absorber layer materials include Selenium-based chalcogenides such as Copper-Indium-DiSelenide (CIS), or an alloy thereof. Some examples of CIS alloys include Copper-Indium-Gallium-DiSelenide (CIGS), Silver-Copper-Indium-Gallium-DiSelenide (AgCIGS), and Copper-Indium-Gallium-Aluminum-DiSelenide (CIGAS). Replacing or alloying selenium in the solar absorber with other group VI elements, such as Sulfur or Tellurium, is also attractive in certain applications. Some examples of possible heterojunction partner layer materials include Cadmium Sulfide, metal oxides, or alloys thereof. Additional layers, such as buffer layers and/or stress relief layers, are often added to photovoltaic device 100. For example, a metallic layer, such as a Molybdenum layer 118, is sometimes disposed on back outer surface 116 of substrate 104 to provide stress relief and dissipate static electricity.
Many photovoltaic devices include a plurality of photovoltaic cells electrically coupled in series and/or parallel to meet an application's voltage and/or current requirements. It is often desirable that the plurality of photovoltaic cells be monolithically integrated on a common substrate. Monolithic integration can enable customization of device output voltage and output current ratings during device design, thereby allowing the device to be tailored to its intended application. Additionally, monolithic integration promotes small device size and pleasing aesthetic properties by reducing pitch between adjacent photovoltaic cells, as well by reducing or eliminating use of discrete bus bars to connect adjacent cells, relative to non-monolithically integrated photovoltaic devices.
Monolithic integration requires, though, that an outer surface of the device substrate, such as outer surface 108 of substrate 104 (FIG. 1), be dielectric. Specifically, the surface must be dielectric to allow electrical separation of adjacent photovoltaic cells by cell isolation scribes, which are sometimes referred to as “P1” scribes. If the substrate outer surface were instead conductive, or if the P1 scribe penetrated a surface dielectric to a conductive substrate, then adjacent photovoltaic cells would electrically short together, thereby rendering the P1 scribes ineffective. Some examples of monolithic integration techniques including use of cell isolation scribes are disclosed in U.S. Patent Application Publication Number 2008/0314439 to Misra, which is incorporated herein by reference.
A dielectric surface may be obtained on a conductive flexible substrate, such as metallic foil, by applying a dielectric coating to the substrate. However, this procedure may be difficult to implement because the dielectric coating must be free of defects, such as pinholes, to prevent photovoltaic cell electrical shorting. Additionally, the dielectric coating is prone to damage during thin-film deposition on the substrate, as well as during the monolithic integration patterning process.
Alternately, a dielectric substrate may be used with monolithic integration. However, few flexible substrate materials are both dielectric and able to withstand high temperature processing associated with thin-film layer deposition. One possible flexible dielectric substrate material is flexible glass. However, flexible glass substrates are still in their developmental stage and are not available for use in high volume production applications. Another flexible dielectric substrate material is polyimide. Thin polyimide substrates are widely available and some formulations can often survive processing temperatures of up to 450 degrees Celsius for short periods of time, such as for 30 minutes or less.
FIG. 2 illustrates a prior art CIGS deposition zone 200 adapted to form a CIGS solar absorber layer on a flexible polyimide substrate 202 having a thickness 230 and opposing front and back outer surfaces 218, 228, respectively. Substrate 202 has been prepped with an electrical contact layer (not shown) on front outer surface 218, where the contact layer is analogous to layer 106 of FIG. 1. A stress relief layer (not shown) analogous to layer 118 of FIG. 1 is optionally disposed on back outer surface 228. Deposition zone 200 includes a plurality of sources that respectively emit metallic plumes 212, 214, 216 that are subsequently disposed in front 210 of substrate 202. In this system, three sources 204, 206, and 208 dispose metallic elements onto front outer surface 218 of substrate 202; these elements typically include one or more of Copper, Indium, and Gallium. A Selenium manifold 220 provides Selenium vapor 222 to deposition zone 200 in front 210 of substrate 202. Substrate heaters 224, which are disposed behind 226 substrate 202, provide radiant heat to back outer surface 228 of substrate 202. A zone enclosure and vacuum pump (not shown) maintain a vacuum in deposition zone 200. Copper, Indium, and Gallium emitted from sources 204, 206, 208 onto front outer surface 218 of substrate 202 collectively react in the presence of Selenium vapor 222 to form a precursor of, or the entirety of, a CIGS layer on substrate front outer surface 218, given a proper thermodynamic environment.
Metallic sources 204, 206, 208 provide some heat to front outer surface 218. Furthermore, additional heaters (not shown) are sometimes disposed in front 210 of substrate 202 to enhance early deposition run stability and to prevent elements from condensing and re-evaporating. These additional heaters, if present, will also somewhat heat front outer surface 218. However, substrate heaters 224, which heat substrate back outer surface 228, provide the majority of thermal energy necessary to enable CIGS deposition. Substrate heaters 224 may require different set points relative to one another to achieve the desired substrate 202 temperature, due to different levels of heating provided by sources 204, 206, and 208. As known in the art, CIS/CIGS deposition requires high substrate temperatures, and photovoltaic device efficiency is often dependent on substrate temperature. For example, substrate temperatures in excess of 500 degrees Celsius are typically required to obtain highest efficiency CIS/CIGS photovoltaic devices. Additionally, studies have shown potential advantages of increasing the Se thermal energy during thin-film deposition, such as by using a Se furnace or cracker, to reduce the Se evaporant cluster size during the co-evaporated CIGS process. (See, e.g., M. Kawamura et al., “Cu(InGa)Se2 thin-film solar cells grown with cracked selenium,” Journal of Crystal Growth, vol. 311, Jan. 15, 2009, pp. 753-756). While rigid glass substrates are durable to these temperatures, flexible polyimide substrates degrade at elevated temperatures, thereby limiting CIS/CIGS deposition processes on polyimide substrates. Additionally, polyimide substrates are highly susceptible to absorbing water vapor, which can subsequently be released when heated during CIS/CIGS fabrication. Unless extreme care is taken to ensure that polyimide substrates are properly degassed prior to electrical contact layer deposition, moisture may be trapped under the first electrical contact layer during substrate heating, potentially leading to PV device cracking and blistering. Cracking and blistering may dramatically impair photovoltaic device performance and/or manufacturing yield.